1. general description the 74hc3g34-q100; 74hct3g34-q100 are triple buffers. inputs include clamp diodes. this enables the use of current limiting resist ors to interface inputs to voltages in excess of v cc . this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? input levels: ? for 74hc3g34-q100: cmos level ? for 74hct3g34-q100: ttl level ? wide supply voltage range from 2.0 v to 6.0 v ? symmetrical output impedance ? high noise immunity ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? low-power dissipation ? balanced propagation delays ? multiple package options 3. ordering information 74hc3g34-q100; 74hct3g34-q100 dual non-inverting schmitt trigger rev. 1 ? 16 may 2013 product data sheet table 1. ordering information type number package temperature range name description version 74hc3g34dp-q100 ? 40 ? c to +125 ? c tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 74hct3g34dp-q100 74HC3G34DC-Q100 ? 40 ? c to +125 ? c vssop8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 74hct3g34dc-q100
74hc_hct3g34_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved . product data sheet rev. 1 ? 16 may 2013 2 of 13 nxp semiconductors 74hc3g34-q100; 74hct3g34-q100 dual non-inverting schmitt trigger 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram 6. pinning information 6.1 pinning table 2. marking type number marking code [1] 74hc3g34dp-q100 h34 74hct3g34dp-q100 t34 74HC3G34DC-Q100 p34 74hct3g34dc-q100 u34 fig 1. logic symbol fig 2. iec logic symbol mna744 1a 1y 17 3y 3a 26 2a 2y 35 7 1 1 1 5 3 mna745 1 2 6 fig 3. pin configuration sot505-2 (tssop8) and sot765-1 (vssop8) + & |